Texas Instruments is offering a 16-bit, single-channel, 135Msample/s analogue-to-digital converter (ADC) and a low-jitter clock synthesizer.

Sampling at 135Msample/s, the ADC can achieve a SNR of 78.6dBFS with 95dBc SFDR for a 70MHz input frequency (IF), which is up to 3.5dB greater SNR or 8dB greater SFDR over comparable ADCs.

The ADS5483 eases analogue front-end design by incorporating a fully differential input buffer.

Developed in TI’s BiCom3 high-speed process technology, this buffer provides constant input impedance over input frequency and eliminates kickback from the ADC’s track-and-hold structure to ensure consistent linearity of the signal.

The ADS5483 utilises differential double data rate (DDR) LVDS outputs to significantly reduce the number of I/O traces and pins it consumes on FPGA or ASIC devices. 

The CDCE72010 clock synthesizer provides additive jitter performance at less than 50fs, which meets the jitter requirements to clock the high-speed ADC.

For example, the combined EVM using the CDCE72010 and a crystal band pass filter to drive the ADS5483 at 122.8Msample/s achieves a high system-level SNR of 78.0 dBFS SNR and 89.1 dBc SFDR with a 100-MHz input frequency.

See http://www.ti.com